IC 555 how it works

INTRODUCTION

The 555 timer IC is an integerated circuit (chip) used in a variety of  timer, pulse generation, and oscillator applications. The 555 can be used to provide time delays, as an oscillator, and as a flip-flop element. Derivatives provide two (556) or four (558) timing circuits in one package.

Introduced in 1972 by Signetics, the 555 is still in widespread use due to its low price, ease of use, and stability. It is now made by many companies in the original bipolar and in low-power CMOS technologies. As of 2003, it was estimated that 1 billion units were manufactured every year. The 555 is the most popular integrated circuit ever manufactured.

HISTORY 

The IC was designed in 1971 by Hans R. Camenzid under contract to Signetics, later acquired by Phillips Semiconductors, now NXP.

In 1962, Camenzind joined PR Mallory's Laboratory for Physical Science in Burlington, Massachusetts. He designed a pulse width modulation (PWM) amplifier for audio applications. however, it was not successful in the market because there was no power transistor included. He became interested in tuners such as a gyrator and a phased locked loop (PLL). He was hired by Signetics to develop a PLL IC in 1968. He designed an oscillator for PLLs such that the frequency did not depend on the power supply voltage or temperature. Signetics subsequently laid off half of its employees due to a recession development on the PLL was thus frozen.

Camenzind proposed the development of a universal circuit based on the oscillator for PLLs and asked that he develop it alone, borrowing equipment from Signetics instead of having his pay cut in half. Other engineers argued the product could be built from existing parts; however, the marketing manager approved the idea. Among 5xx numbers that were assigned for analog ICs, the part number "555" was chosen.

Camenzind also taught circuit design at Northeastern University in the morning attending the university himself at night working toward a Master's degree in Business Administration.^[10] The first design for the 555 was reviewed in the summer of 1971. Assessed to be without error, it proceeded to layout design. A few days later, Camenzind got the idea of using a direct resistance instead of a constant current source finding later that it worked. The change decreased the required 9 pins to 8 so the IC could be fit in an 8-pin package instead of a 14-pin package. This revised design passed a second design review with the prototype completed in October 1971. The 9-pin copy had been already released by another company founded by an engineer who attended the first review and retired from Signetics; that firm withdrew its version soon after the 555 was released. The 555 timer was manufactured by 12 companies in 1972 and it became a best selling product

INTERNAL STRUCTURE

* IN THIS DIAGRAM YOU CAN SEE THE INTERNAL STRUCTURE AND TRUTH TABLE OF IC 555

                                                           

                Important features of ic 555 :-

• It operates from a wide range of power supplies ranging from + 5 Volts to + 18 Volts supply voltage.

• Sinking or sourcing 200 mA of load current.

• The external components should be selected properly so that the timing intervals can be made into several minutes along with the frequencies exceeding several hundred kilohertz.

• The output of a 555 timer can drive a transistor-transistor logic (TTL) due to its high current output.

• It has a temperature stability of 50 parts per million (ppm) per degree Celsius change in temperature, or equivalently 0.005 %/ °C.

• The duty cycle of the timer is adjustable.

• The maximum power dissipation per package is 600 mW and its trigger and reset inputs has logic compatibility. More features are listed in the datasheet.

PIN CONFIGURATION

Pin 1: Grounded Terminal: All the voltages are measured with respect to the Ground terminal.

Pin 2: Trigger Terminal: The trigger pin is used to feed the trigger input hen the 555 IC is set up as a monostable multivibrator. This pin is an inverting input of a COMPARATOR and is responsible for the transition of FLIP-FLOP from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. A negative pulse with a dc level greater than Vcc/3 is applied to this terminal. In the negative edge, as the trigger passes through Vcc/3, the output of the lower comparator becomes high and the complimentary of Q becomes zero. Thus the 555 IC output gets a high voltage, and thus a quasi stable state.

Pin 3: Output Terminal: Output of the timer is avail­able at this pin. There are two ways in which a load can be connected to the output terminal. One way is to connect between output pin (pin 3) and ground pin (pin 1) or between pin 3 and supply pin (pin 8). The load connected between output and ground supply pin is called the normally on load and that connected between output and ground pin is called the normally off load.

Pin 4: Reset Terminal: Whenever the timer IC is to be reset or disabled, a negative pulse is applied to pin 4, and thus is named as reset terminal. The output is reset irrespective of the input condition. When this pin is not to be used for reset purpose, it should be connected to + VCC to avoid any possibility of false triggering.

Pin 5: Control Voltage Terminal: The threshold and trigger levels are controlled using this pin. The pulse width of the output waveform  is determined by connecting a POT or bringing in an external voltage to this pin.  The external voltage applied to this pin can also be used to modulate the output waveform. Thus, the amount of voltage applied in this terminal will decide when the comparator is to be switched, and thus changes the pulse width of the output. When this pin is not used, it should be bypassed to ground through a 0.01 micro Farad to avoid any noise problem.

Pin 6: Threshold Terminal: This is the non-inverting input terminal of comparator 1, which compares the voltage applied to the terminal with a reference voltage of 2/3 VCC. The amplitude of voltage applied to this terminal is responsible for the set state of flip-flop. When the voltage applied in this terminal is greater than 2/3Vcc, the upper comparator switches to +Vsat and the output gets reset.

Pin 7 : Discharge Terminal: This pin is connected internally to the collector of transistor and mostly a capacitor is connected between this terminal and ground. It is called discharge terminal because when transistor saturates, capacitor discharges through the transistor. When the transistor is cut-off, the capacitor charges at a rate determined by the external resistor and capacitor.

Pin 8: Supply Terminal: A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to ground (pin 1).